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| AMIS-30621 Micro-Stepping Motor Driver INTRODUCTION The AMIS-30621 is a single-chip micro-stepping motor driver with position controller and control/diagnostic interface. It is ready to build dedicated mechatronics solutions connected remotely with a LIN master. The chip receives positioning instructions through the bus and subsequently drives the motor coils to the desired position. The on-chip position controller is configurable (OTP or RAM) for different motor types, positioning ranges and parameters for speed, acceleration and deceleration. The AMIS-30621 acts as a slave on the LIN bus and the master can fetch specific status information like actual position, error flags, etc. from each individual slave node. The chip is implemented in I2T100 technology, enabling both high voltage analog circuitry and digital functionality on the same chip. The AMIS-30621 is fully compatible with the automotive voltage requirements. PRODUCT FEATURES Motordriver http://onsemi.com SOIC-20 3 & 7 SUFFIX CASE 751AQ * * * * * * Micro-Stepping Technology Peak Current Up to 800 mA Fixed Frequency PWM Current-Control Automatic Selection of Fast and Slow Decay Mode No External Fly-Back Diodes Required Compliant with 14 V Automotive Systems and Industrial Systems Up to 24 V NQFP-32 6 SUFFIX CASE 560AA ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Controller with RAM and OTP Memory * Position Controller * Configurable Speeds and Acceleration * Input to Connect Optional Motion Switch LIN Interface *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. * Physical Layer Compliant to LIN rev. 2.0. Data-Link * * * * * * * * * * Layer Compatible with LIN Rev. 1.3 (Note 1) Field-Programmable Node Addresses Dynamically Allocated Identifiers Diagnostics and Status Information Power Saving * Powerdown Supply Current < 50 mA * 5 V Regulator with Wake-up on LIN Activity EMI Compatibility * LIN Bus Integrated Slope Control * HV Outputs with Slope Control * These are Pb-Free Devices Protection Overcurrent Protection Undervoltage Management Open-Circuit Detection High Temperature Warning and Management Low Temperature Flag LIN Bus Short-Circuit Protection to Supply and Ground Lost LIN Safe Operation 1. Minor exceptions to the conformance of the data-link layer to LIN rev. 1.3. (c) Semiconductor Components Industries, LLC, 2010 February, 2010 - Rev. 4 1 Publication Order Number: AMIS-30621/D AMIS-30621 APPLICATIONS The AMIS-30621 is ideally suited for small positioning applications. Target markets include: automotive (headlamp alignment, HVAC, idle control, cruise control), industrial equipment (lighting, fluid control, labeling, process control, XYZ tables, robots...) and building automation (HVAC, Table 1. ORDERING INFORMATION Part No. AMIS30621C6213G AMIS30621C6213RG AMIS30621C6216G AMIS30621C6216RG AMIS30621C6217G** AMIS30621C6217RG** Peak Current 800 mA 800 mA 800 mA 800 mA 800 mA 800 mA UV* High High Low Low Low Low Package SOIC-20 (Pb-Free) NQFP-32 (7 x 7 mm) (Pb-Free) SOIC-20 (Pb-Free) Shipping Tube / Tray Tape & Reel Tube / Tray Tape & Reel Tube / Tray Tape & Reel surveillance, satellite dish, renewable energy systems). Suitable applications typically have multiple axes or require mechatronic solutions with the driver chip mounted directly on the motor. For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *UV undervoltage lock out levels: see DC Parameters UV1 & UV2 (Stop Voltage thresholds). ** For prodcut versions AMIS30621C6217G and AMIS30621C6217RG the Ihold0 bit in OTP is programmed to `1'. QUICK REFERENCE DATA Table 2. ABSOLUTE MAXIMUM RATINGS Symbol VBB, VHW2, VSWI Vlin TJ Tst Vesd Parameter Supply voltage, Hardwired Address and SWI Pins Bus input voltage Junction temperature range (Note 2) Storage temperature Human Body Model Electrostatic discharge voltage on LIN pin (Note 3) Human Body Model Electrostatic discharge voltage on other pins (Note 3) CDM Electrostatic discharge voltage on other pins (Note 4) Min -0.3 -40 -50 -55 -4 -2 -500 Max +40 (Note 1) +40 +175 +160 +4 +2 +500 Unit V V C C kV kV V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. For limited time: VBB < 0.5 s, SWI and HW2 pins < 1.0 s. 2. The circuit functionality is not guaranteed. 3. Human Body Model according to MIL-STD-883 Method 3015.7, measured on SOIC devices, and according to AEC-Q100: EIA-JESD22-A114-B (100 pF via 1.5 kW) measured on NQFP device. 4. CDM according to EOS_ESD-DS5.3-1993 (draft)-socketed mode, measured on SOIC devices, and according to AEC-Q100: EIA-JESD22-A115-A measured on NQFP devices. Table 3. OPERATING RANGES Symbol VBB TJ Supply voltage Operating temperature range (Note 5) Parameter Min +6.5 -40 Max +29 +165 Unit V C 5. Note that the thermal warning and shutdown will get active at the level specified in the "DC Parameters". No more than 100 cumulated hours in life time above Ttw. http://onsemi.com 2 AMIS-30621 Table of Contents General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . Product Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . Quick Reference Data . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package Thermal Resistance . . . . . . . . . . . . . . . . . . . . . SWI AMIS-30621 LIN BUS Interface Position Controller HW[2:0] TST Controller 1 1 2 2 2 2 3 4 5 DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Positioning Parameters . . . . . . . . . . . . . . . . . . . . . . . . 10 Structural Description . . . . . . . . . . . . . . . . . . . . . . . . . 13 Functions Description . . . . . . . . . . . . . . . . . . . . . . . . . 14 Lin Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 LIN Application Commands . . . . . . . . . . . . . . . . . . . . 42 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 I-sense PWM regulator X MOTXP MOTXN Decoder Main Control Registers OTP - ROM Sinewave Table DAC's 4 MHz Vref Temp sense Oscillator I-sense Voltage Regulator Charge Pump PWM regulator Y MOTYP MOTYN VBB VDD CPN CPP VCP GND Figure 1. Block Diagram http://onsemi.com 3 AMIS-30621 GND 32 XP XP VBB VBB VBB SWI NC HW0 9 HW1 VDD GND TST LIN GND HW2 NC 1 2 3 4 5 6 7 8 AMIS-30621 (Top View) 31 30 29 28 27 26 24 23 22 21 20 19 18 10 11 12 13 14 15 17 16 NQFP-32 GND GND GND XN YP YP XN HW0 HW1 VDD GND TST LIN GND HW2 CPN CPP 1 2 3 4 5 6 7 8 9 10 SOIC-20 AMIS-30621 20 19 18 17 16 15 14 13 12 11 SWI VBB MOTXP GND MOTXN MOTYP GND MOTYN VBB VCP 25 YN YN VBB VBB VBB VCP CPP CPN Figure 2. SOIC-20 and NQFP-32 Pin-out Table 4. PIN DESCRIPTION Pin Name HW0 HW1 VDD GND TST LIN HW2 CPN CPP VCP VBB MOTYN MOTYP MOTXN MOTXP SWI NC Bit 0 of LIN-ADD Bit 1 of LIN-ADD Internal supply (needs external decoupling capacitor) Ground, heat sink Test pin (to be tied to ground in normal operation) LIN-bus connection Bit 2 LIN-ADD Negative connection of pump capacitor (charge pump) Positive connection of pump-capacitor (charge pump) Charge-pump filter-capacitor Battery voltage supply Negative end of phase Y coil Positive end of phase Y coil Negative end of phase X coil Positive end of phase X coil Switch input Not connected (to be tied to ground) Pin Description To be Tied to GND or VDD SOIC-20 1 2 3 4,7,14,17 5 6 8 9 10 11 12,19 13 15 16 18 20 NQFP-32 8 9 10 11, 14, 25, 26, 31, 32 12 13 15 17 18 19 3, 4, 5, 20, 21, 22 23, 24 27, 28 29, 30 1, 2 6 7, 16 http://onsemi.com 4 AMIS-30621 PACKAGE THERMAL RESISTANCE The AMIS-30621 is available in SOIC-20 and optimized NQFP32 packages. For cooling optimizations, the NQFP has an exposed thermal pad which has to be soldered to the PCB ground plane. The ground plane needs thermal vias to conduct the head to the bottom layer. Figures 3 and 4 give examples for good power distribution solutions. For precise thermal cooling calculations the major thermal resistances of the devices are given. The thermal media to which the power of the devices has to be given are: * Static environmental air (via the case) * PCB board copper area (via the device pins and exposed pad) The thermal resistances are presented in Table 5: DC Parameters. Rth Junction-to-Leads and Exposed Pad (Rthjp) The major thermal resistances of the device are the Rth from the junction to the ambient (Rthja) and the overall Rth from the junction to the leads (Rthjp). The NQFP device is designed to provide superior thermal performance. Using an exposed die pad on the bottom surface of the package, is mainly contributing to this performance. In order to take full advantage of the exposed pad, it is most important that the PCB has features to conduct heat away from the package. A thermal grounded pad with thermal vias can achieve this. In below table, one can find the values for the Rthja and Rthjp, simulated according to the JESD-51standard: Package SOIC-20 NQFP-32 Rth Junction-to-Leads (Rthjp) 19 Rth Junction-to-Ambient Rthja 1S0P 62 60 Rth Junction-to-Ambient Rthja 2S2P 39 30 0.95 The Rthja for 2S2P is simulated conform to JESD-51 as follows: * A 4-layer printed circuit board with inner power planes and outer (top and bottom) signal layers is used * Board thickness is 1.46 mm (FR4 PCB material) * The 2 signal layers: 70 mm thick copper with an area of 5500 mm2 copper and 20% conductivity * The 2 power internal planes: 36 mm thick copper with an area of 5500 mm2 copper and 90% conductivity The Rthja for 1S0P is simulated conform to JESD-51 as follows: * A 1-layer printed circuit board with only 1 layer * Board thickness is 1.46 mm (FR4 PCB material) * The layer has a thickness of 70 mm copper with an area of 5500 mm2 copper and 20% conductivity Figure 3. Example of SOIC-20 PCB Ground Plane Layout (Preferred Layout at Top and Bottom) Figure 4. Example of NQFP-32 PCB Ground Plane Layout (Preferred Layout at Top and Bottom) http://onsemi.com 5 IIIIIIIIIIIII IIIIII IIIIIIIIIIIII IIIIIIIIII IIIIII III IIIIIIIIIIIII IIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII NQFP-32 IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII IIIIIIIIIIIII SOIC-20 AMIS-30621 DC PARAMETERS The DC parameters are guaranteed over temperature and VBB in the operating range, unless otherwise specified. Convention: currents flowing into the circuit are defined as positive. Table 5. DC PARAMETERS Symbol IMSmax,Peak IMSmax,RMS IMSabs IMSrel RDS(on) MOTXP MOTXN MOTYP MOTYN Pins Parameter Max current through motor coil in normal operation Max RMS Current Through Coil in Normal Operation Absolute Error on Coil Current (Note 6) Matching of X and Y Coil Currents On Resistance for Each Motor Pin at IMSmax (Note 7) Test Conditions VBB = 14 V VBB = 14 V VBB = 14 V VBB = 14 V VBB = 12 V, TJ = 50C VBB = 8 V, TJ = 50C VBB = 12 V, TJ = 150C VBB = 8 V, TJ = 150C IMSL LIN TRANSMITTER Ibus_off Ibus_off LIN Ibus_lim Rslave LIN RECEIVER Vbus_dom Vbus_rec Vbus_hys Ttw Ttsd Tlow LIN Receiver Dominant State Receiver Recessive State Receiver Hysteresis Thermal warning Thermal shutdown (Notes 8 and 9) Low temperature warning (Note 9) Supply voltage for OTP zapping (Note 10) Stop voltage high threshold Stop voltage low threshold VBB Stop voltage high threshold Stop voltage low threshold Total current consumption Sleep mode current consumption Regulated internal supply (Note 11) VDD Digital supply reset level @ powerdown (Note 12) Current limitation Pin shorted to ground VBB = 14 V Unloaded outputs VBB = 29 V VBB = 8 V and 18 V 8 V < VBB < 29 V 4.75 Product versions with high UV; See Ordering Information Product versions with low UV; See Ordering Information 9.0 7.7 7.0 8.8 8.1 1 8.3 7.5 9.3 8.5 3.50 40 5 VBB = 8 V and 18 V VBB = 8 V and 18 V VBB = 8 V and 18 V 0 0.6 * VBB 0.05 * VBB 138 145 Ttw + 10 Ttw - 152 0.4 * VBB VBB 0.175 * VBB 152 V V V C C C Current Limitation Pullup Resistance Dominant State, Driver Off Recessive State, Driver Off Vbus = 0 V, VBB = 8 V and 18 V Vbus = Vbat, VBB = 8 V and 18 V VBB = 8 V and 18 V VBB = 8 V and 18 V 50 20 75 30 -1 20 130 47 mA mA mA kW Pull down current HiZ Mode, VBB = 7.7 V 0.4 -10 -7 0 0.50 0.55 0.70 0.85 Min Typ 800 570 10 7 1 1 1 1 2.2 Max Unit mA mA % % W W W W mA MOTORDRIVER THERMAL WARNING AND SHUTDOWN SUPPLY AND VOLTAGE REGULATOR VBBOTP UV1 UV2 UV1 UV2 Ibat Ibat_s VDD VDDReset IDDLim 10.0 8.9 8.0 9.8 8.9 10.0 100 5.25 4.5 40 V V V V V mA mA V V mA http://onsemi.com 6 AMIS-30621 Table 5. DC PARAMETERS Symbol Rt_OFF Rt_ON VBB_sw Ilim_sw Pins Parameter Switch OPEN Resistance (Note 13) Switch ON Resistance SWI HW2 (Note 13) VBB range for guaranteed operation of SWI and HW2 Current limitation Short to GND or Vbat VBB = 29 V VBB = 14 V VBB = 14 V VBB = 14 V 7 V < VBB v 14 V 14 V < VBB External buffer capacitor CPP CPN External pump capacitor Thermal resistance junction-to-ambient (2S2P) Thermal resistance junction-to-leads Thermal resistance junction-to-ambient (2S2P) Thermal resistance junction-to-leads and exposed pad Simulated conform JEDEC JES.D51 VBB + 10 220 220 39 19 30 0.95 0.075 * VDD 2 * VBB - 2.5 VBB + 15 470 470 0.7 * VDD 0.3 * VDD Switch to GND or VBB 6 Test Conditions Min 10 2 29 45 Typ Max Unit kW kW V mA SWITCH INPUT AND HARDWIRE ADDRESS INPUT HARDWIRED ADDRESS INPUTS AND TEST PIN Vhigh Vlow HWhyst VCP VCP Cbuffer Cpump Rthja Rthjp Rthja Rthjp Input level high HW0 Input level low HW1 TST Hysteresis Output voltage V V V V V nF nF K/W K/W K/W K/W CHARGE PUMP PACKAGE THERMAL RESISTANCE VALUES SO SO NQ NQ 6. Tested in production for 800 mA, 400 mA, 200 mA and 100 mA current settings for both X and Y coil. 7. Based on characterization data. 8. No more than 100 cumulated hours in life time above Ttw. 9. Thermal shutdown and low temperature warning are derived from thermal warning. Guaranteed by design. 10. A buffer capacitor of minimum 100 mF is needed between VBB and GND. Short connections to the power supply are recommended. 11. Pin VDD must not be used for any external supply 12. The RAM content will not be altered above this voltage. 13. External resistance value seen from pin SWI or HW2, including 1 kW series resistor. For the switch OPEN, the maximum allowed leakage current is represented by a minimum resistance seen from the pin. http://onsemi.com 7 AMIS-30621 AC PARAMETERS The AC parameters are guaranteed for temperature and VBB in the operating range unless otherwise specified. The LIN transmitter and receiver physical layer parameters are compliant to LIN rev. 2.0 & 2.1. Table 6. AC PARAMETERS Symbol POWERUP Tpu fosc D1 Powerup Time Guaranteed by Design 10 ms Pins Parameter Test Conditions Min Typ Max Unit INTERNAL OSCILLATOR Frequency of Internal Oscillator VBB = 14 V THRec(max)= 0.744 x VBB THDom(max)= 0.581 x VBB; VBB = 7.0 V...18 V; tBit = 50 ms THRec(min)= 0.284 x VBB THDom(min)= 0.422 x VBB; VBB = 7.6 V...18 V; tBit = 50 ms 3.6 4.0 4.4 MHz LIN TRANSMITTER CHARACTERISTICS ACCORDING TO LIN V2.0 & V2.1 Duty Cycle 1 = tBus_rec(min)/ (2 x tBit); See Figure 5 LIN 0.396 D2 Duty Cycle 2 = tBus_rec(max)/ (2 x tBit); See Figure 5 0.581 LIN RECEIVER CHARACTERISTICS ACCORDING TO LIN V2.0 & V2.1 trx_pdr trx_pdf trx_sym Propagation delay bus dominant VBB = 7.0 V & 18 V; to RxD = Low See Figure 5 LIN Propagation delay bus recessive to RxD = High Symmetry of receiver propagation delay VBB = 7.0 V & 18 V; See Figure 5 trx_pdr - trx_pdf -2 6 6 +2 ms ms ms SWITCH INPUT AND HARDWIRE ADDRESS INPUT Tsw Tsw_on Fpwm Tbrise Tbfall Tstab CHARGE PUMP fCP CPN CPP Charge pump frequency (Note 14) VBB = 14 V 250 kHz MOTxx SWI HW2 Scan pulse period (Note 14) Scan pulse duration (Note 14) VBB = 14 V VBB = 14 V 18 Between 10% and 90% VBB = 14 V 1024 64 ms ms MOTORDRIVER PWM frequency (Note 14) Turn-on transient time Turn-off transient time Run current stabilization time (Note 14) 20 150 140 1/Vmin 22.0 kHz ns ns s 14. Derived from the internal oscillator http://onsemi.com 8 AMIS-30621 TxD tBIT 50% t LIN tBUS_dom(max) tBUS_rec(min) tBIT THRec(max) THDom(max) THRec(min) THDom(min) Thresholds receiver 1 Thresholds receiver 2 t RxD (receiver 2) tBUS_dom(min) tBUS_rec(max) 50% trx_pdf trx_pdr t Figure 5. Timing Diagram for AC Characteristics According to LIN 2.0 & 2.1 TYPICAL APPLICATION VBAT C8 100 nF C7 100 mF CPN VDD 1 mF C9 HW0 HW1 Connect to VBAT or GND LIN bus VDR 27 V C10 1 kW C1 2.7 nF LIN 6 5 TST GND 4 7 14 17 HW2 9 3 220 nF C5 C6 220 nF VBB 12 C3 100 nF VBB 19 20 C4 100 nF CPP VCP 10 11 1k SWI MOTXP C2 2.7 nF Connect to VBAT or GND 1 2 8 AMIS-30621 18 16 MOTXN MOTYP MOTYN M 15 13 Figure 6. Typical Application Diagram for SO device. 15. All resistors are 5%, 1/4 W 16. C1, C2 minimum value is 2.7 nF, maximum value is 10 nF 17. Depending on the application, the ESR value and working voltage of C7 must be carefully chosen 18. C3 and C4 must be close to pins VBB and GND 19. C5 and C6 must be as close as possible to pins CPN, CPP, VCP, and VBB to reduce EMC radiation 20. C9 must be a ceramic capacitor to assure low ESR 21. C10 is placed for EMC reasons; value depends on EMC requirements of the application http://onsemi.com 9 AMIS-30621 POSITIONING PARAMETERS Stepping Modes Maximum Velocity One of four possible stepping modes can be programmed: * Half-stepping * 1/4 micro-stepping * 1/8 micro-stepping * 1/16 micro-stepping For each stepping mode, the maximum velocity Vmax can be programmed to 16 possible values given in the table below. The accuracy of Vmax is derived from the internal oscillator. Under special circumstances it is possible to change the Vmax parameter while a motion is ongoing. All 16 entries for the Vmax parameter are divided into four groups. When changing Vmax during a motion the application must take care that the new Vmax parameter stays within the same group. Table 7. MAXIMUM VELOCITY SELECTION TABLE Vmax index Vmax (full step/s) 99 136 167 197 213 228 243 273 303 334 364 395 456 546 729 973 D C B Half-stepping (half-step/s) 197 273 334 395 425 456 486 546 607 668 729 790 912 1091 1457 1945 Stepping mode 1/4th Micro-stepping (micro-step/s) 395 546 668 790 851 912 973 1091 1213 1335 1457 1579 1823 2182 2914 3891 1/8th Micro-stepping (micro-step/s) 790 1091 1335 1579 1701 1823 1945 2182 2426 2670 2914 3159 3647 4364 5829 7782 1/16th Micro-stepping (micro-step/s) 1579 2182 2670 3159 3403 3647 3891 4364 4852 5341 5829 6317 7294 8728 11658 15564 Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F Dec 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Group A http://onsemi.com 10 AMIS-30621 Minimum Velocity Once the maximum velocity is chosen, 16 possible values can be programmed for the minimum velocity Vmin. The table below provides the obtainable values in full-step/s. The accuracy of Vmin is derived from the internal oscillator. Table 8. OBTAINABLE VALUES IN FULL-STEP/S FOR THE MINIMUM VELOCITY Vmax (Full-step/s) Vmin Index Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F Dec 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Vmax Factor 1 1/32 2/32 3/32 4/32 5/32 6/32 7/32 8/32 9/32 10/32 11/32 12/32 13/32 14/32 15/32 A 99 99 3 6 9 12 15 18 21 24 28 31 34 37 40 43 46 136 136 4 8 12 16 21 25 30 33 38 42 47 51 55 59 64 167 167 5 10 15 20 26 31 36 41 47 51 57 62 68 72 78 197 197 6 11 18 24 31 36 43 49 55 61 68 73 80 86 93 B 213 213 6 12 19 26 32 39 46 52 59 66 72 79 86 93 99 228 228 7 13 21 28 35 42 50 56 64 71 78 85 93 99 107 243 243 7 14 22 30 37 45 52 60 68 75 83 91 98 106 113 273 273 8 15 25 32 42 50 59 67 76 84 93 101 111 118 128 303 303 8 17 27 36 46 55 65 74 84 93 103 113 122 132 141 334 334 10 19 31 40 51 61 72 82 93 103 114 124 135 145 156 C 364 364 10 21 32 44 55 67 78 90 101 113 124 135 147 158 170 395 395 11 23 36 48 61 72 86 97 111 122 135 147 160 172 185 456 456 13 27 42 55 71 84 99 113 128 141 156 170 185 198 214 546 546 15 31 50 65 84 99 118 134 153 168 187 202 221 237 256 D 729 729 19 42 65 88 111 134 156 179 202 225 248 271 294 317 340 973 973 27 57 88 118 149 179 210 240 271 301 332 362 393 423 454 NOTES: The Vmax factor is an approximation. In case of motion without acceleration (AccShape = 1) the length of the steps = 1/Vmin. In case of accelerated motion (AccShape = 0) the length of the first step is shorter than 1/Vmin depending of Vmin, Vmax and Acc. http://onsemi.com 11 AMIS-30621 Acceleration and Deceleration Sixteen possible values can be programmed for Acc (acceleration and deceleration between Vmin and Vmax). The table below provides the obtainable values in full-step/s2. One observes restrictions for some combinations of acceleration index and maximum speed (gray cells). The accuracy of Acc is derived from the internal oscillator. Table 9. ACCELERATION AND DECELERATION SELECTION TABLE Vmax (FS/s) Acc Index Hex 0 1 2 3 4 5 6 7 8 9 A B C D E F Dec 0 1 2 3 4 5 6 7 8 9 10 14785 11 12 13 14 15 29570 49 218 1004 3609 6228 8848 11409 13970 16531 19092 21886 24447 27008 29570 34925 40047 Acceleration (Full-step/s2) 106 473 735 99 136 167 197 213 228 243 273 303 334 364 395 456 546 729 973 The formula to compute the number of equivalent full-steps during acceleration phase is: Nstep + V max 2 2 * V min 2 Positioning Acc The position programmed in commands SetPosition and SetPositionShort is given as a number of (micro-)steps. According to the chosen stepping mode, the position words must be aligned as described in the table below. When using command SetPositionShort or GotoSecurePosition, data is automatically aligned. Table 10. POSITION WORD ALIGNMENT Stepping Mode 1/16th 1/8th 1/4th Half-stepping PositionShort SecurePosition S S S S S S Position Word: Pos[15:0] B14 B13 B12 B11 B10 B13 B12 B11 B10 B12 B11 B10 B11 B10 S B9 S B8 B9 B9 B7 B9 B8 B8 B6 B9 B8 B7 B7 B5 B9 B8 B7 B6 B6 B4 B8 B7 B6 B5 B5 B3 B7 B6 B5 B4 B4 B2 B6 B5 B4 B3 B3 B1 B5 B4 B3 B2 B2 LSB B4 B3 B2 B1 B1 0 B3 B2 B1 LSB LSB 0 B2 B1 LSB 0 0 0 B1 LSB 0 0 0 0 LSB 0 0 0 0 0 Shift No shift 1-bit left x2 2-bit left x4 3-bit left x8 No Shift No shift NOTES: LSB: Least Significant Bit S: Sign bit, two's complement http://onsemi.com 12 AMIS-30621 Position Ranges A position is coded by using the binary two's complement format. According to the positioning commands used and to the chosen stepping mode, the position range will be as shown in the following table. Table 11. POSITION RANGE Command Stepping Mode Half-stepping SetPosition 1/4th 1/8th micro-stepping micro-stepping micro-stepping Position Range -4096 to +4095 -8192 to +8191 -16384 to +16383 -32768 to +32767 -1024 to +1023 Full Range Excursion 8192 half-steps 16384 micro-steps 32768 micro-steps 65536 micro-steps 2048 half-steps Number of Bits 13 14 15 16 11 1/16th SetPositionShort Half-stepping When using the command SetPosition, although coded on 16 bits, the position word will have to be shifted to the left by a certain number of bits, according to the stepping mode. Secure Position A secure position can be programmed. It is coded in 11-bits, thus having a lower resolution than normal positions, as shown in the following table. See also command GotoSecurePosition and LIN lost behavior. Table 12. SECURE POSITION Stepping Mode Half-stepping 1/4th micro-stepping Secure Position Resolution 4 half-steps 8 micro-steps (1/4th) 16 micro-steps (1/8th) 32 micro-steps (1/16th) 1/8th micro-stepping 1/16th micro-stepping Important NOTES: The secure position is disabled in case the programmed value is the reserved code "10000000000" (0x400 or most negative position). At start up the OTP register is copied in RAM as illustrated below. SecPos10 SecPos9 SecPos8 SecPos2 SecPos1 SecPos0 RAM SecPos10 SecPos9 SecPos8 SecPos2 SecPos1 SecPos0 OTP Shaft A shaft bit, which can be programmed in OTP or with command SetMotorParam, defines whether a positive motion is a clockwise (CW) or counter-clockwise rotation (CCW) (an outer or an inner motion for linear actuators): * Shaft = 0 MOTXP is used as positive pin of the X * Shaft = 1 opposite situation. coil, while MOTXN is the negative one. STRUCTURAL DESCRIPTION See also the Block Diagram in Figure 1. Stepper Motordriver The Motor driver receives the control signals from the control logic. The main features are: * Two H-bridges, designed to drive a stepper motor with two separated coils. Each coil (X and Y) is driven by one H-bridge, and the driver controls the currents flowing through the coils. The rotational position of the * rotor, in unloaded condition, is defined by the ratio of current flowing in X and Y. The torque of the stepper motor when unloaded is controlled by the magnitude of the currents in X and Y. The control block for the H-bridges, including the PWM control, the synchronous rectification and the internal current sensing circuitry. http://onsemi.com 13 AMIS-30621 * The charge pump to allow driving of the H-bridges' LIN Interface high side transistors. * Two pre-scale 4-bit DAC's to set the maximum magnitude of the current through X and Y. * Two DAC's to set the correct current ratio through X and Y. Battery voltage monitoring is also performed by this block, which provides the required information to the control logic part. The same applies for detection and reporting of an electrical problem that could occur on the coils or the charge pump. Control Logic (Position Controller and Main Control) The LIN interface implements the physical layer and the MAC and LLC layers according to the OSI reference model. It provides and gets information to and from the control logic block, in order to drive the stepper motor, to configure the way this motor must be driven, or to get information such as actual position or diagnosis (temperature, battery voltage, electrical status...) and pass it to the LIN master node. Miscellaneous The control logic block stores the information provided by the LIN interface (in a RAM or an OTP memory) and digitally controls the positioning of the stepper motor in terms of speed and acceleration, by feeding the right signals to the motor driver state machine. It will take into account the successive positioning commands to properly initiate or stop the stepper motor in order to reach the set point in a minimum time. It also receives feedback from the motor driver part in order to manage possible problems and decide on internal actions and reporting to the LIN interface. The AMIS-30621 also contains the following: * An internal oscillator, needed for the LIN protocol handler as well as the control logic and the PWM control of the motor driver. * An internal trimmed voltage source for precise referencing. * A protection block featuring a thermal shutdown and a power-on-reset (POR) circuit. * A 5 V regulator (from the battery supply) to supply the internal logic circuitry. FUNCTIONS DESCRIPTION This chapter describes the following functional blocks in more detail: * Position controller * Main control and register, OTP memory + ROM * Motor driver The LIN controller is discussed in a separate chapter. Position Controller Positioning and Motion Control A positioning command will produce a motion as illustrated in Figure 7. A motion starts with an acceleration phase from minimum velocity (Vmin) to maximum velocity (Vmax) and ends with a symmetrical deceleration. This is defined by the control logic according to the position required by the application and the parameters programmed by the application during the configuration phase. The current in the coils is also programmable. Velocity Deceleration range Acceleration range Zero Speed Hold Current Vmax Vmin Pstart P=0 Pstop Pmin Figure 7. Positioning and Motion Control http://onsemi.com 14 NN NN NN NN NN NN NN NN NN NN Pmax NN NN NN NN NN NN NN NN NN NN Zero Speed Hold Current Position AMIS-30621 Table 13. POSITION RELATED PARAMETERS Parameter Pmax - Pmin Zero Speed Hold Current Maximum Current Acceleration and Deceleration Vmin Vmax See Positioning See Ihold See Irun See Acceleration and Deceleration See Minimum Velocity See Maximum Velocity Reference Different positioning examples are shown in the table below. Table 14. POSITIONING EXAMPLES Short motion. Velocity time New positioning command in same direction, shorter or longer, while a motion is running at maximum velocity. Velocity time New positioning command in same direction while in deceleration phase (Note 22) Note: there is no wait time between the deceleration phase and the new acceleration phase. New positioning command in reverse direction while motion is running at maximum velocity. Velocity time Velocity time New positioning command in reverse direction while in deceleration phase. Velocity time New velocity programming while motion is running. Velocity time 22. Reaching the end position is always guaranteed, however velocity rounding errors might occur after consecutive accelerations during a deceleration phase. The velocity rounding error will be removed at Vmin (e.g. at end of acceleration or when AccShape=1). http://onsemi.com 15 AMIS-30621 Dual Positioning A SetDualPosition command allows the user to perform a positioning using two different velocities. The first motion is done with the specified Vmin and Vmax velocities in the SetDualPosition command, with the acceleration (deceleration) parameter already in RAM, to a position Pos1[15:0] also specified in SetDualPosition. Then a second motion to a position Pos2[15:0] is done at the specified Vmin velocity in the SetDualPosition command (no acceleration). Once the second motion is achieved, the ActPos register is reset to zero, whereas TagPos register is not changed. A new motion will start here Vmax Profile: Vmin first movement 27 ms 0 00 During one Vmin time the ActPos is 100 Position: xx 0 second movement 00 5 steps 100 101 104 105 105 0 Secure positioning (if enabled) 00 Depends on AccShape 27 ms 0 Motion status: 0 60 Pos: xx Assume: First Position = 100 Second Position = 105 Secure Position = 60 ActPos: 100 ActPos: 100 ActPos:0 ActPos: 60 ResetPos Figure 8. Dual Positioning Remark: This operation cannot be interrupted or influenced by any further command unless the occurrence of the conditions driving to a motor shutdown or by a HardStop command. Sending a SetDualPosition command while a motion is already ongoing is not recommended. After dual positioning is executed the internal flag "Reference done" is set. 1. The priority encoder is describing the management of states and commands. 2. If a SetPosition(Short) command issued during a DualPosition sequence, it will be kept in position buffer memory and executed afterwards. This applies also for the commands sleep, SetMotorParam and GotoSecurePosition. 3. Commands such as GetActualPos or GetStatus will be executed while a dual positioning is running. This applies also for a dynamic ID assignment LIN frame. 4. A DualPosition sequence starts by setting TagPos buffer register to SecPos value, provided secure position is enabled otherwise TagPos is reset to zero. 5. The acceleration/deceleration value applied during a DualPosition sequence is the one stored in RAM before the SetDualPosition command is sent. The same applies for shaft bit, but not for Irun, Ihold and StepMode, which can be changed during the dual positioning sequence. 6. The Pos1, Pos2, Vmax and Vmin values programmed in a SetDualPosition command apply only for this sequence. All further positioning will use the parameters stored in RAM (programmed for instance by a former SetMotorParam command). 7. Commands ResetPosition, SetDualPosition and SoftStop will be ignored while a DualPosition sequence is ongoing, and will not be executed afterwards. 8. A SetMotorParam command should not be sent during a SetDualPosition sequence. 9. If for some reason ActPos equals Pos1[15:0] at the moment the SetDualPosition command is issued, the circuit will enter in deadlock state. Therefore, the application should check the actual position by a GetPosition or a GetFullStatus command prior to send the SetDualPosition command. http://onsemi.com 16 AMIS-30621 Position Periodicity Depending on the stepping mode the position can range from -4096 to +4095 in half-step to -32768 to +32767 in 1/16th micro-stepping mode. One can project all these positions lying on a circle. When executing the command SetPosition, the position controller will set the movement direction in such a way that the traveled distance is minimal. The figure below illustrates that the moving direction going from ActPos = +30000 to TagPos = -30000 is clockwise. If a counter clockwise motion is required in this example, several consecutive SetPosition commands can be used. +10000 +20000 ActPos = +30000 0 Motion direction TagPos = -30000 -10000 -20000 Hardwired Address HW2 In the drawing below, a simplified schematic diagram is shown of the HW2 comparator circuit. The HW2 pin is sensed via 2 switches. The DriveHS and DriveLS control lines are alternatively closing the top and bottom switch connecting HW2 pin with a current to resistor converter. Closing STOP (DriveHS = 1) will sense a current to GND. In that case the top I R converter output is low, via the closed passing switch SPASS_T this signal is fed to the "R" comparator which output HW2_Cmp is high. Closing bottom switch SBOT (DriveLS = 1) will sense a current to VBAT. The corresponding I R converter output is low and via SPASS_B fed to the comparator. The output HW2_Cmp will be high. Figure 9. Motion Direction is Function of Difference between ActPos and TagPos SPASS_T IR State STOP HW2 SBOT DriveHS LOGIC DriveLS High Low Float 1 kW 1 2 1 = R2GND 2 = R2VBAT 3 = OPEN 3 I/R SPASS_B ``R"-Comp Debouncer COMP Rth 32 ms HW2_Cmp Figure 10. Simplified Schematic Diagram of the HW2 Comparator 3 cases can be distinguished (see also Figure 10 above): * HW2 is connected to ground: R2GND or drawing 1 * HW2 is connected to VBAT: R2VBAT or drawing 2 * HW2 is floating: OPEN or drawing 3 http://onsemi.com 17 AMIS-30621 Table 15. STATE DIAGRAM OF THE HW2 COMPARATOR Previous State Float Float Float Float Low Low Low Low High High High High DriveLS 1 1 0 0 1 1 0 0 1 1 0 0 DriveHS 0 0 1 1 0 0 1 1 0 0 1 1 HW2_Cmp 0 1 0 1 0 1 0 1 0 1 0 1 New State Float High Float Low Low High Float Low Float High High Low Condition R2GND or OPEN R2VBAT R2VBAT or OPEN R2GND R2GND or OPEN R2VBAT R2VBAT or OPEN R2GND R2GND or OPEN R2VBAT R2VBAT or OPEN R2GND Drawing 1 or 3 2 2 or 3 1 1 or 3 2 2 or 3 1 1 or 3 2 2 or 3 1 The logic is controlling the correct sequence in closing the switches and in interpreting the 32 ms debounced HW2_Cmp output accordingly. The output of this small state-machine is corresponding to: * High or address = 1 * Low or address = 0 * Floating As illustrated in the table above (Table 15), the state is depending on the previous state, the condition of the 2 switch controls (DriveLS and DriveHS) and the output of HW2_Cmp. The figure below is showing an example of a practical case where a connection to VBAT is interrupted. http://onsemi.com 18 AMIS-30621 Condition R2 VBAT DriveLS Tsw = 1024 ms OPEN R2 VBAT R2 GND t t DriveHS Tsw_on = 64 ms t "R"-Comp Rth t HW2_Cmp t State Float Float High High Low t Figure 11. Timing Diagram Showing the Change in States for HW2 Comparator R2VBAT A resistor is connected between VBAT and HW2. Every 1024 ms SBOT is closed and a current is sensed. The output of the I R converter is low and the HW2_Cmp output is high. Assuming the previous state was floating, the internal logic will interpret this as a change of state and the new state will be high (see also Table 15). The next time SBOT is closed the same conditions are observed. The previous state was high, so based on Table 15 the new state remains unchanged. This high state will be interpreted as HW2 address = 1. OPEN will be low. The previous state was high. Based on Table 15 one can see that the state changes to float. This will trigger a motion to secure position. R2GND In case the HW2 connection is lost (broken wire, bad contact in connector) the next time SBOT is closed, this will be sensed. There will be no current, the output of the corresponding I R converter is high and the HW2_Cmp If a resistor is connected between HW2 and the GND, a current is sensed every 1024 ms when STOP is closed. The output of the top I R converter is low and as a result the HW2_Cmp output switches to high. Again based on the stated diagram in Table 15 one can see that the state will change to Low. This low state will be interpreted as HW2 address = 0. External Switch SWI As illustrated in Figure 12 the SWI comparator is almost identical to HW2. The major difference is in the limited number of states. Only open or closed is recognised leading to respectively ESW = 0 and ESW = 1. http://onsemi.com 19 AMIS-30621 SPASS_T IR State 1 kW STOP DriveHS Closed LOGIC SWI SBOT DriveLS Open 1 2 1 = R2GND 2 = R2VBAT 3 = OPEN 3 I/R SPASS_B ``R"-Comp COMP 32 ms Debouncer SWI_Cmp Rth Figure 12. Simplified Schematic Diagram of the SWI Comparator As illustrated in the drawing above, a change in state is always synchronized with DriveHS or DriveLS. The same synchronization is valid for updating the internal position register. This means that after every current pulse (or closing of STOP or SBOT) the state of the position switch together with the corresponding position is memorized. Table 16. GetActualPos LIN COMMAND The GetActualPos command reads back the Reading Frame Structure Byte 0 1 2 3 4 5 Content Identifier Data 1 Data 2 Data 3 Data 4 Checksum VddReset StepLoss ElDef Bit 7 * ESW Bit 6 * Bit 5 1 Bit 4 0 Bit 3 ID3 AD[6:0] ActPos[15:8] ActPos[7:0] UV2 TSD TW Tinfo[1:0] Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Checksum over data http://onsemi.com 20 AMIS-30621 DriveHS Tsw = 1024 ms 512 ms Tsw_on = 64 ms DriveLS t t "R"-Comp Rth t SWI_Cmp 60 ms t ESW 0 1 1 1 t ActPos + 1 ActPos + 2 ActPos + 3 ActPos ActPos t Figure 13. Simplified Timing Diagram Showing the Change in States for SWI Comparator Main Control and Register, OTP memory + ROM Power-up Phase Sleep Mode Power up phase of the AMIS-30621 will not exceed 10ms. After this phase, the AMIS-30621 is in standby mode, ready to receive LIN messages and execute the associated commands. After power-up, the registers and flags are in the reset state, while some of them are being loaded with the OTP memory content (see Table 19). Reset After power-up, or after a reset occurrence (e.g. a micro-cut on pin VBB has made VDD to go below VDDReset level), the H-bridges will be in high-impedance mode, and the registers and flags will have a predetermined value. This is documented in Tables 19 and 20. Soft Stop A soft stop is an immediate interruption of a motion, but with a deceleration phase. At the end of this action, the register When entering sleep mode, the stepper-motor can be driven to its secure position. After which, the circuit is completely powered down, apart from the LIN receiver, which remains active to detect a dominant state on the bus. In case sleep mode is entered while a motion is ongoing, a transition will occur towards secure position as described in Positioning and Motion Control provided http://onsemi.com 21 AMIS-30621 Thermal Shutdown Mode When thermal shutdown occurs, the circuit performs a Temperature Management diagram and illustration of Figure 14 below. The only condition to reset flags The AMIS-30621 monitors temperature by means of two thresholds and one shutdown level, as illustrated in the state Normal Temp. - T < Ttw & T > Ttw LIN frame: GetStatus or GetFullStatus T < Ttw Post thermal warning - T > Ttsd T < Ttsd T < Tlow Post thermal shutdown 1 - T > Ttw Figure 14. State Diagram Temperature Management http://onsemi.com 22 AMIS-30621 T shutdown level T T warning level t T T < Ttw and getstatus or getfullstatus T T > Ttsd, motor stops and shutdown T < Ttw and getstatus or getfullstatus Figure 15. Illustration of Thermal Management Situation Battery Voltage Management The AMIS-30621 monitors the battery voltage by means of one threshold and one shutdown level. The only condition to reset flags - NORMAL VOLTAGE VBB > UV1 VBB > UV1 & LIN Frame & LIN Frame - - Figure 16. State Diagram Battery Voltage Management http://onsemi.com 23 AMIS-30621 In Stop mode 1 the motor is put in shutdown state. The OTP Memory Structure Important Notes: * In the case of Stop mode 2, care needs to be taken * * because the accumulated steploss can cause a significant deviation between physical and stored actual position. The SetDualPosition command will only be executed after clearing the The table below shows how the parameters to be stored in the OTP memory are located. Table 17. OTP MEMORY STRUCTURE Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 Bit 7 OSC3 1 ADM Irun3 Vmax3 SecPos10 SecPos7 Bit 6 OSC2 TSD2 (HW2) (Note 23) Irun2 Vmax2 SecPos9 SecPos6 Bit 5 OSC1 TSD1 (HW1) (Note 23) Irun1 Vmax1 SecPos8 SecPos5 Bit 4 OSC0 TSD0 (HW0) (Note 23) Irun0 Vmax0 Shaft SecPos4 Bit 3 IREF3 BG3 PA3 Ihold3 Vmin3 Acc3 SecPos3 StepMode1 Bit 2 IREF2 BG2 PA2 Ihold2 Vmin2 Acc2 SecPos2 StepMode0 Bit 1 IREF1 BG1 PA1 Ihold1 Vmin1 Acc1 SecPos1 LOCKBT Bit 0 IREF0 BG0 PA0 Ihold0 (Note 24) Vmin0 Acc0 SecPos0 LOCKBG 23. Although not stored in the OTP memory the physical status of the hardware address input pins are returned by a read of the OTP contents (GetOTPparam). 24. Note for product version AMIS30621C6217G and AMIS30621C6217RG the Ihold0 bit is programmed to '1'. Parameters stored at address 0x00 and 0x01 and bit Table 18. OTP OVERWRITE PROTECTION Lock Bit LOCKBT (factory zapped before delivery) LOCKBG Protected Bytes 0x00 to 0x01 0x00 to 0x07 functional verification before using a SetOTPparam command to program and zap separately one OTP memory byte. A GetOTPparam command issued after each SetOTPparam command allows verifying the correct byte zapping. Note: zapped bits will really be "active" after a GetOTPparam or a ResetToDefault command or after a power-up. Application Parameters Stored in OTP Memory The command used to load the application parameters via the LIN bus in the RAM prior to an OTP Memory programming is SetMotorParam. This allows for a Except for the physical address http://onsemi.com 24 AMIS-30621 Irun[3:0] Current amplitude value to be fed to each coil of the stepper-motor. The table below provides the 16 possible values for Index 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Irun 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Run Current (mA) 59 71 84 100 119 141 168 200 238 283 336 400 476 566 673 800 Ihold[3:0] Hold current for each coil of the stepper-motor. The table below provides the 16 possible values for Index 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Ihold 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Hold Current (mA) 59 71 84 100 119 141 168 200 238 283 336 400 476 566 673 800 Note: When the motor is stopped, the current is reduced from Step Mode 0 0 1 1 0 1 0 1 Step Mode 1/2 stepping 1/4 stepping 1/8 stepping 1/16 stepping Shaft This bit distinguishes between a clock-wise or counter-clock-wise rotation. http://onsemi.com 25 AMIS-30621 Vmax[3:0] Maximum velocity. Index 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Vmax 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Vmax(full step/s) 99 136 167 197 213 228 243 273 303 334 364 395 456 546 729 973 D C B Group A Index 0 1 2 3 4 5 6 7 8 9 A B C D E F Vmax Factor 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1/32 2/32 3/32 4/32 5/32 6/32 7/32 8/32 9/32 10/32 11/32 12/32 13/32 14/32 15/32 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Acc 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Acceleration (Full-Steps2) 49* 218* 1004 3609 6228 8848 11409 13970 16531 19092* 21886* 24447* 27008* 29570* 34925* 40047* Acc[3:0] Acceleration and deceleration between Vmax and Vmin. Vmin[3:0] Minimum velocity. Index 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Vmin *restriction on speed SecPos[10:0] Secure Position of the stepper-motor. This is the position to which the motor is driven in case of a LIN communication loss or when the LIN error-counter overflows. If http://onsemi.com 26 AMIS-30621 Table 19. RAM REGISTERS Register Actual position Mnemonic ActPos Length (bit) 16 Related commands Comment 16-bit signed Reset State GetActualPos GetFullStatus GotoSecurePos ResetPosition GetFullStatus GotoSecurePos ResetPosition SetPosition SetPositionShort GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam GetFullStatus ResetToDefault SetMotorParam SetPositionShort Last programmed Position Pos/ TagPos 16/11 16-bit signed or 11-bit signed for half stepping (see Positioning) Note 25 Acceleration shape Coil peak current AccShape 1 `0' normal acceleration from Vmin to Vmax `1' motion at Vmin without acceleration Operating current See look-up table Irun Standstill current See look-up table Ihold See Section Minimum Velocity See look-up table Vmin See Section Maximum Velocity See look-up table Vmax Direction of movement `0' Irun 4 Coil hold current Ihold 4 Minimum Velocity Vmin 4 Maximum Velocity Vmax 4 Shaft Shaft 1 From OTP memory Acceleration/ deceleration Secure Position Acc 4 See Section Acceleration See look-up table Acc Target position when LIN connection fails; 11 MSB's of 16-bit position (LSB's fixed to `0') See Section Stepping Modes See look-up table StepMode SecPos 11 Stepping mode StepMode 2 25. A ResetToDefault command will act as a reset of the RAM content, except for ActPos and TagPos registers that are not modified. Therefore, the application should not send a ResetToDefault during a motion, to avoid any unwanted change of parameter. http://onsemi.com 27 AMIS-30621 Table 20. FLAGS TABLE Flag Charge pump failure Electrical defect Mnemonic CPFail Length (bit) 1 Related Commands Comment `0' = charge pump OK `1' = charge pump failure Resets only after GetFullStatus GetFullStatus ElDef 1 GetActualPos GetStatus GetFullStatus GetActualPos GetStatus GetFullStatus Internal use `0' External switch status Electrical flag Motion status ESW 1 `0' HS Motion 1 3 `0' "000" GetFullStatus Over current in coil X Over current in coil Y Secure position enabled Circuit going to Sleep mode Step loss OVC1 OVC2 SecEn Sleep StepLoss 1 1 1 1 1 GetFullStatus GetFullStatus Internal use Internal use `0' `0' n.a. `0' `1' GetActualPos GetStatus GetFullStatus Internal use Motor stop Temperature info Stop Tinfo 1 2 `0' "00" = normal temperature range "01" = low temperature warning "10" = high temperature warning "11" = motor shutdown `1' = shutdown (Tj > Ttsd) Resets only after Get(Full)Status and if GetActualPos GetStatus GetFullStatus GetActualPos GetStatus GetFullStatus GetActualPos GetStatus GetFullStatus GetActualPos GetStatus GetFullStatus GetActualPos GetStatus GetFullStatus Thermal shutdown Thermal warning TSD 1 `0' TW 1 `0' Battery stop voltage Digital supply reset UV2 1 `0' VDDReset 1 `1' http://onsemi.com 28 AMIS-30621 Priority Encoder The table below describes the simplified state management performed by the main control block. Table 21. PRIORITY ENCODER State " Command GetActualPos GetOTPparam Stopped Motor Stopped, Ihold in Coils LIN in-frame response OTP refresh; LIN in-frame response LIN in-frame response GotoPos Motor Motion Ongoing LIN in-frame response OTP refresh; LIN in-frame response LIN in-frame response DualPosition No Influence on RAM and TagPos LIN in-frame response OTP refresh; LIN in-frame response LIN in-frame response SoftStop Motor Decelerating LIN in-frame response OTP refresh; LIN in-frame response LIN in-frame response HardStop Motor Forced to Stop LIN in-frame response OTP refresh; LIN in-frame response LIN in-frame response ShutDown Motor Stopped, H-bridges in Hi-Z LIN in-frame response OTP refresh; LIN in-frame response LIN in-frame response; if ( GetFullStatus or GetStatus [ attempt to clear OTP refresh; OTP to RAM; AccShape reset RAM update OTP refresh; OTP to RAM; AccShape reset RAM update OTP refresh; OTP to RAM; AccShape reset (Note 28) RAM update OTP refresh; OTP to RAM; AccShape reset RAM update OTP refresh; OTP to RAM; AccShape reset RAM update TagPos and ActPos reset TagPos updated; GotoPos TagPos updated; GotoPos If TagPos and ActPos reset DualPosition HardStop SoftStop Sleep or LIN timeout [ Sleep Shutdown Shutdown n.a. SoftStop Stopped SoftStop Stopped Stopped; TagPos =ActPos Stopped; TagPos =ActPos n.a. n.a. With the Following Color Code: Command Ignored NOTE: Transition to Another State Master is responsible for proper update (see Note 32) See table notes on the following page. http://onsemi.com 29 AMIS-30621 26. Leaving sleep state is equivalent to POR. 27. After POR, the shutdown state is entered. The shutdown state can only be left after GetFullStatus command (so that the master could read the POR Dual Position Referencing Thermal Shutdown HardStop HardStop SoftStop Set Dual Position Motion finished HardStop Motion Finished GotoSecPos HardStop Thermal ShutDown SoftStop HardStop Thermal Shutdown Shutdown GetFullStatus SetPosition Motion Finished GotoPos Motion Finished Priorities 1 2 3 Sleep 4 Figure 17. Simplified State Diagram http://onsemi.com 30 AMIS-30621 Motordriver Current Waveforms in the Coils Figure 18 below illustrates the current fed to the motor coils by the motor driver in half-step mode. Ix Iy Coil X t Coil Y Figure 18. Current Waveforms in Motor Coils X and Y in Halfstep Mode Whereas Figure 19 below shows the current fed to the coils in 1/16th micro stepping (1 electrical period). Coil X Iy Ix t Coil Y Figure 19. Current Waveforms in Motor Coils X and Y in 1/16th Micro-Step Mode PWM Regulation In order to force a given current (determined by switches. The zoom over one micro-step in the Figure 19 above shows how the PWM circuit performs this regulation. Motor Starting Phase At motion start, the currents in the coils are directly switched from http://onsemi.com 31 AMIS-30621 Motor Stopping Phase At the end of the deceleration phase, the currents are maintained in the coils at their actual DC level (hence keeping the sine/cosine ratio between coils) during the stabilization time tstab (see AC Table). The currents are then set to the hold values, respectively Ihold x sin(TagPos) and Ihold x cos(TagPos), as illustrated below. A new positioning order can then be executed. Iy Ix t t stab Figure 20. Motor Stopping Phase Charge Pump Monitoring Motor Shutdown Mode If the charge pump voltage is not sufficient for driving the high side transistors (due to a failure), an internal HardStop command is issued. This is acknowledged to the master by raising flag Electrical Defect on Coils, Detection and Confirmation The principle relies on the detection of a voltage drop on at least one transistor of the H-bridge. Then the decision is taken to open the transistors of the defective bridge. This allows the detection the following short circuits: * External coil short circuit * Short between one terminal of the coil and Vbat or GND * One cannot detect an internal short in the motor. Open circuits are detected by 100% PWM duty cycle value during one electrical period with duration, determined by Vmin. Table 22. ELECTRICAL DEFECT DETECTION Pins Yi or Xi Yi or Xi Yi or Xi Y1 and Y2 X1 and X2 Xi and Yi Fault mode Short circuit to GND Short circuit to Vbat Open Short circuited Short circuited Short circuited A motor shutdown occurs when: * The chip temperature rises above the thermal shutdown threshold Ttsd (see Thermal Shutdown Mode). * The battery voltage goes below UV2 (see Battery Voltage Management). * The charge pump voltage goes below the charge pump comparator level Flag * H-bridges in high impedance mode. * The orders or send status. The conditions to get out of a motor shutdown mode are: * Reception of a GetStatus or GetFullStatus command AND * The four above causes are no longer detected This leads to H-bridges going in Ihold mode. Hence, the circuit is ready to execute any positioning command. This can be illustrated in the following sequence given as an application example. The master can check whether there is a problem or not and decide which application strategy to adopt. A motor shutdown leads to the following: http://onsemi.com 32 AMIS-30621 Table 23. EXAMPLE OF POSSIBLE SEQUENCE USED TO DETECT AND DETERMINE CAUSE OF MOTOR SHUTDOWN TJ w Tsd or VBB v UV2 or SetPosition frame O - The position set-point is updated by the LIN Master - Motor shutdown mode no motion - The application is still unaware GetFullStatus or GetStatus frame O - The application is aware of a problem GetFullStatus or GetStatus frame O... - Possible confirmation of the problem - Reset Important: While in shutdown mode, since there is no hold current in the coils, the mechanical load can cause a step loss, which indeed cannot be flagged by the AMIS-30621. If the LIN communication is lost while in shutdown mode, the circuit enters the sleep mode immediately (Note 1). Warning: The application should limit the number of consecutive GetStatus or GetFullStatus commands to try to get the AMIS-30621 out of shutdown mode when this proves to be unsuccessful, e.g. there is a permanent defect. The reliability of the circuit could be altered since Get(Full)Status attempts to disable the protection of the H-bridges. Note 1: The Priority Encoder is describing the management of states and commands. LIN CONTROLLER General Description The LIN (local interconnect network) is a serial communications protocol that efficiently supports the control of mechatronics nodes in distributed automotive applications. The physical interface implemented in the AMIS-30621 is compliant to the LIN rev. 2.0 & 2.1 specifications. It features a slave node, thus allowing for: * single-master / multiple-slave communication * self synchronization without quartz or ceramics resonator in the slave nodes * guaranteed latency times for signal transmission * single-signal-wire communication * transmission speed of 19.2 kbit/s * selectable length of Message Frame: 2, 4, and 8 bytes * configuration flexibility * data checksum (classic checksum, cf. LIN1.3) security * detection of defective nodes in the network and error detection It includes the analog physical layer and the digital protocol handler. The analog circuitry implements a low side driver with a pull-up resistor as a transmitter, and a resistive divider with a comparator as a receiver. The specification of the line driver/receiver follows the ISO 9141 standard with some enhancements regarding the EMI behavior. http://onsemi.com 33 AMIS-30621 VBB 30 kW RxD to control block LIN protocol handler Filter TxD Slope Control LIN LIN address HW0 HW1 HW2 from OTP Figure 21. LIN Interface Slave Operational Range for Proper Self Synchronization The LIN interface will synchronize properly in the following conditions: * Vbat w 8 V VBB w 7.3 V * Ground shift between master node and slave node < 1 V It is highly recommended to use the same type of reverse battery voltage protection diode for the Master and the Slave nodes. Functional Description Analog Part the characteristics of the transmitted and received signal. See AC Parameters for timing values. Protocol Handler This block implements: * Bit Synchronization * Bit Timing * The MAC Layer * The LLC Layer * The Supervisor Error Status Register The transmitter is a low-side driver with a pull-up resistor and slope control. The receiver mainly consists of a comparator with a threshold equal to VBB/2. Figure 5 shows Table 24. LIN ERROR REGISTER Bit 7 Not used Bit 6 Not used Bit 5 Not used Bit 4 Not used The LIN interface implements a register containing an error status of the LIN communication. This register is as follows: Bit 3 Time out error Bit 2 Data error Flag Bit 1 Header error Flag Bit 0 Bit error Flag With: * Time out error: The message frame is not fully completed within the maximum length TFRAME_MAX * Data error flag: Checksum error StopBit error Length error * Header error flag:Parity SynchField error * Bit error flag: Difference in bit sent and bit monitored on the LIN bus A GetFullStatus frame will reset the error status register. http://onsemi.com 34 AMIS-30621 Physical Address of the Circuit The circuit must be provided with a physical address in order to discriminate it from other ones on the LIN bus. This address is coded on 7 bits, yielding the theoretical possibility of 128 different circuits on the same bus. AD[6:0] LIN SLAVE ADDRESS Figure 22. 7-bit LIN Address However the maximum number of nodes in a LIN network is also limited by the physical properties of the bus line. It is recommended to limit the number of nodes in a LIN network to not exceed 16. Otherwise the reduced network impedance may prohibit a fault free communication under worst case conditions. Every additional node lowers the network impedance by approximately three percent. All LIN commands are using 7-bit addressing except SetPositionShort where only the four least significant address bits are used. These bits are shaded in Figure 23. The ADMbit allows the use of "SetPositionShort". This give coverage for slaves with different PA3 // HW2 addresses which are attached to the same LIN bus. The physical address AD[6:0] is a combination of four OTP memory bits PA[3:0] from the OTP Memory Structure and the hardwired address bits HW[2:0]. Depending on the addressing mode (ADM -bit in OTP Memory Structure) the combination is as illustrated in Figure 23. HW0 HW1 HW2 PA3 PA2 PA1 PA0 Hardwired MSB PA0 HW0 HW1 HW2 PA3 PA2 PA1 OTP memory Hardwired Figure 23. Combination of OTP and Hardwired Address Bits in Function of ADM OOOOOOO OOOOOOO MSB OOOOOOO OOOOOOO OOOOOOO OOOOOOO LSB OTP memory LSB OTP memory 35 MSB LSB Note: Pins HW0 and HW1 are 5 V digital inputs, whereas pin HW2 is compliant with a 12 V level, e.g. it can be connected to Vbat or GND via a terminal of the PCB. For SetPositionShort operation: It is recommended to set HW0 and HW1 to '1'. If the ADM bit is set to '1' the PA0 bit in OTP has to programmed to '1'. If the ADM bit is set to '0', HW2 has to be set to '1'. LIN Frames The LIN frames can be divided in writing and reading frames. A frame is composed of an 8-bit Identifier followed by 2, 4 or 8 data-bytes and a checksum byte. Note: the checksum is conform LIN1.3, classic checksum calculation over only data bytes. (Checksum is an inverted 8-bit sum with carry over all data bytes.) Writing frames will be used to: * Program the OTP Memory; * Configure the component with the stepper-motor parameters (current, speed, stepping-mode, etc.); * Provide set-point position for the stepper-motor; * Control the motion state machine. * Get the actual position of the stepper-motor; * Get status information such as error flags; * Verify the right programming and configuration of the component. Whereas reading frames will be used to: http://onsemi.com AMIS-30621 Writing Frames The LIN master sends commands and/or information to the slave nodes by means of a writing frame. According to the LIN specification, identifiers are to be used to determine Identifier Byte ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 phys. address a specific action. If a physical addressing is needed, then some bits of the data field can be dedicated to this, as illustrated in the example below. Data Byte 1 Data Byte 2 command parameters (e.g. position) ID 0x3C 00 AppCmd NOTE: Data Byte 1 1 command physical address Data Byte 2 Data Byte 3 for example use the reserved identifier 0x3C and take advantage of the 8 byte data field to provide a physical address, a command and the needed parameters for the action, as illustrated in the example below. Data Byte 4 Data Byte 5 Data Byte 6 Data Byte 7 Data Byte 8 parameters Bit 7 of Data byte 1 must be at `1' since the LIN specification requires that contents from 0x00 to 0x7F must be reserved for broadcast messages (0x00 being for the "Sleep" message). See also LIN command Sleep The writing frames used with the AMIS-30621 are the following: Type #1: General purpose two or four data bytes writing frame with a dynamically assigned identifier. This type is dedicated to short writing actions when the bus load can be an issue. They are used to provide direct command to one (( ID ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7 NOTE: ID5 0 0 1 1 Data1 command ( Data2 Physical address Broad Data3 ... Parameters ... Type #2: two, four or eight data bytes writing frame with an identifier dynamically assigned to an application command, regardless of the physical address of the circuit. Type #3: two data bytes writing frame with an identifier dynamically assigned to a particular slave node together with an application command. This type of frame requires that there are as many dynamically assigned identifiers as there are AMIS-30621 circuits using this command connected to the LIN bus. Type #4: eight data bytes writing frame with 0x3C identifier. http://onsemi.com 36 AMIS-30621 Reading Frames A reading frame uses an in-frame response mechanism. That is: the master initiates the frame (synchronization field + identifier field), and one slave sends back the data field together with the check field. Hence, two types of identifiers can be used for a reading frame: * Direct ID, which points at a particular slave node, indicating at the same time which kind of information is awaited from this slave node, thus triggering a specific command. This ID provides the fastest access to a read command but is forbidden for any other action. * Indirect ID, which only specifies a reading command, the physical address of the slave node that must answer having been passed in a previous writing frame, called a preparing frame. Indirect ID gives more flexibility than a direct one, but provides a slower access to a read command. NOTES: 1. A reading frame with indirect ID must always be consecutive to a preparing frame. It will otherwise not be taken into account. 2. A reading frame will always return the physical address of the answering slave node in order to ensure robustness in the communication. The reading frames, used with the AMIS-30621, are the following: Type #5: two, four or eight Data bytes reading frame with a direct identifier dynamically assigned to a particular slave node together with an application command. A preparing frame is not needed. Type #6: eight Data bytes reading frame with 0x3D identifier. This is intrinsically an indirect type, needing therefore a preparation frame. It has the advantage to use a reserved identifier. (Note: because of the parity calculation done by the master, the identifier becomes 0x7D as physical data over the bus). Preparing Frames A preparing frame is a frame from the master that warns a particular slave node that it will have to answer in the next frame (being a reading frame). A preparing frame is needed when a reading frame does not use a dynamically assigned direct ID. Preparing and reading frames must be consecutive. A preparing frame will contain the physical address of the LIN slave node that must answer in the reading frame and will also contain a command indicating which kind of information is awaited from the slave. The preparing frames used with the AMIS-30621 can be of type #7 or type #8 described below. Type #7: two data bytes writing frame with dynamically assigned identifier. The identifier of the preparing frame has to be assigned to ROM pointer 1000, see Table 28. http://onsemi.com 37 AMIS-30621 Table 25. PREPARING FRAME #7 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * 1 1 Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 CMD[6:0] AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Type #8: eight data bytes preparing frame with 0x3C identifier. Table 26. PREPARING FRAME #8 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD = ... CMD[6:0] AD[6:0] Data4[7:0] FF Data5[7:0] FF Data6[7:0] FF Data7[7:0] FF Data8[7:0] FF Checksum over data Where: AppCMD: If = `0x80' this indicates that Data 2 contains an application command CMD[6:0]: Application Command "byte" AD[6:0]: Slave node physical address Datan[7:0]: Data transmitted Dynamic Assignment of Identifiers The identifier field in the LIN datagram denotes the content of the message. Six identifier bits and two parity bits are used to represent the content. The identifiers 0x3C and 0x3F are reserved for command frames and extended frames. Slave nodes need to be very flexible to adapt itself to a given LIN network in order to avoid conflicts with slave nodes from different manufacturers. Dynamic assignment of the identifiers will fulfill this requirement by writing identifiers into the circuits RAM. ROM pointers are linking commands and dynamic identifiers together. A writing frame with identifier 0x3C issued by the LIN master will write dynamic identifiers into the RAM. One writing frame is able to assign 4 identifiers; therefore 3 frames are needed to assign all identifiers. Each ROM pointer http://onsemi.com 38 AMIS-30621 Table 27. DYNAMIC IDENTIFIERS WRITING FRAME Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier AppCMD CMD Address Data Data Data Data Data Checksum ROMp_4[1:0] DynID_4[5:0] Checksum over data DynID_2[1:0] ROMp_3[3:0] DynID_3[5:0] ROMp_4[3:2] 1 Broad AD6 AD5 AD4 Bit 7 Bit 6 Bit 5 Bit 4 0x3C 0x80 0x11 AD3 AD2 AD1 AD0 Bit 3 Bit 2 Bit 1 Bit 0 DynID_1[3:0] ROMp_2[3:0] ROMp_1[3:0] DynID_1[5:4] DynID_2[5:2] Where: CMD[6:0]: 0x11, corresponding to dynamic assignment of four LIN identifiers Broad:If Dynamic ID User Defined User Defined User Defined User Defined User Defined User Defined User Defined User Defined User Defined ROM pointer 0010 0011 0100 0101 0110 0111 0000 0001 1000 Application Command GetActualPos GetStatus SetPosition SetPositionShort (1 m) SetPositionShort (2 m) SetPositionShort (4 m) GeneralPurpose 2 bytes GeneralPurpose 4 bytes Preparation Frame Command assignment via Dynamic ID during operation Figure 24. Principle of Dynamic Command Assignment http://onsemi.com 39 AMIS-30621 Commands Table Table 28. LIN COMMANDS WITH CORRESPONDING ROM POINTER Command Mmnemonic Command Byte (CMD) 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 010000 001011 001100 001101 001110 n.a. 001111 010001 0x0F 0x11 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x0B 0x0C 0x0D 0x0E Dynamic ID (Example) 100xxx n.a. n.a. 000xxx n.a. n.a. n.a. n.a. n.a. n.a. n.a. 010xxx 001001 101001 111001 n.a. n.a. n.a. 011000 101000 011010 0000 0001 1000 0100 0101 0110 0111 0011 ROM Pointer 0010 GetActualPos GetFullStatus GetOTPparam GetStatus GotoSecurePosition HardStop ResetPosition ResetToDefault SetDualPosition SetMotorParam SetOTPparam SetPosition (16-bit) SetPositionShort (1 motor) SetPositionShort (2 motors) SetPositionShort (4 motors) Sleep SoftStop Dynamic ID assignment General purpose 2 Data bytes General purpose 4 Data bytes Preparing frame NOTE: "Xxx" allows addressing physically a slave node. Therefore, these dynamic identifiers cannot be used for more than eight stepper motors. Only nine ROM pointers are needed for the AMIS-30621. http://onsemi.com 40 AMIS-30621 LIN Lost Behavior Introduction When the LIN communication is broken for a duration of 25000 consecutive frames (= 1.30 s @ 19200 kbit/s) AMIS-30621 sets an internal flag called "LIN lost". Dependant on the contents of RAM register SecPos[10:0] a motion to the secure position will start followed by entering the sleep mode. Motion to Secure Position AMIS-30621 is able to perform an autonomous motion to the predefined secure position SecPos[10:0]. This positioning starts after the detection of lost LIN communication and in case RAM register SecPos[10:0] 0 0x400. The functional behavior depends if LIN communication is lost during normal operation (see Figure 25 case A) or at (or before) start-up (See Figure 25 state SHUTDOWN): Power Up "SecPos[10:0]" from RAM register will be used. This can be different from OTP register if earlier LIN master communication has updated this. See also Secure Position and command SetMotorParam. 1. If the LIN communication is lost there are two possibilities: I. If SecPos[10:0] = 0x400: No secure positioning will be performed AMIS-30621 will enter the SLEEP state II. If SecPos[10:0] 0 0x400: Perform a secure positioning. This is an absolute positioning (slave knows its ActPos. SecPos[10:0] will be copied in TagPos). After the positioning is finished AMIS-30621 will enter the SLEEP state. Important Remarks: 1. The secure position has a resolution of 11 bit. 2. Same behavior in case of HW2 float (= lost LIN address). See also Hardwired Address HW2 A OTP content is copied in RAM SetMotorParam (RAM content is overwritten) GetFullStatus (LIN communication ON) LIN bus OK No No SHUTDOWN LIN bus OK Yes A SecPos 0 0x400 Yes Yes Secure Positioning to TagPos No Figure 25. Flow Chart Powerup of AMIS-30621. Case A: LIN Lost During Operation and LIN Lost at Start-up Resulting in Shutdown LIN Lost During Normal Operation Normal Function SLEEP SLEEP Figure 26. Case A: LIN Lost During Normal Operation LIN Lost Before or at Power On If the LIN communication is lost during normal operation, it is assumed that AMIS-30621 is referenced. In other words the ActPos register contains the "real" actual position. At LIN - lost an absolute positioning to the stored secure position SecPos is done. This is further called secure positioning. Following sequence will be followed. See Figure 26. If the LIN communication is lost before or at power on, no correct GetFullStatus command is received. For that reason the ShutDown state is not left and the stepper motor is kept un-powered. http://onsemi.com 41 AMIS-30621 LIN APPLICATION COMMANDS Introduction The LIN Master will have to use commands to manage the different application tasks the AMIS-30621 can feature. The commands summary is given in Table 29 below. Table 29. COMMANDS SUMMARY Command Mnemonic READING COMMAND Code Prep # Frames Read # Write # Description GetActualPos GetFullStatus GetOTPparam GetStatus WRITING COMMANDS 0x00 0x01 0x02 0x03 7, 8 7, 8 7, 8 5, 6 6 6 5 Returns the actual position of the motor Returns a complete status of the circuit Returns the OTP memory content Returns a short status of the circuit GotoSecurePosition HardStop ResetPosition ResetToDefault 0x04 0x05 0x06 0x07 0x08 0x09 0x10 0x0B 0x0C 0x0D 0x0E 1 1 1 1 4 4 4 1, 3, 4 2 2 2 Drives the motor to its secure position Immediate motor stop Actual position becomes the zero position Ram Content reset Drives the motor to 2 different positions with different speeds Programs the motion parameters and values for the current in the motor's coils Programs (and zaps) a selected byte of the OTP memory Drives the motor to a given position Drives the motor to a given position (half step mode only) Drives two motors to 2 given positions (half step only) Drives four motors to 4 given positions (half step only) SetDualPosition SetMotorParam SetOTPparam SetPosition SetPositionShort (1 m.) SetPositionShort (2 m.) SetPositionShort (4 m.) SERVICE COMMANDS Sleep SoftStop 0x0F 1 1 Drives circuit into sleep mode Motor stopping with a deceleration phase These commands are described hereafter, with their corresponding LIN frames. Refer to LIN Frames for more details on LIN frames, particularly for what concerns dynamic assignment of identifiers. A color coding is used to distinguish between master and slave parts within the frames and to highlight dynamic identifiers. An example is shown below. Figure 27. Color Code Used in the Definition of LIN Frames http://onsemi.com 42 AMIS-30621 Usually, the AMIS-30621 makes use of dynamic identifiers for general-purpose two, four or eight bytes writing frames. If dynamic identifiers are used for other purposes, this is acknowledged. Some frames implement a GetActualPos This command is provided to the circuit by the LIN master to get the actual position of the stepper-motor. This position ( 1. four data bytes in-frame response with direct ID (type #5) Table 30. READING FRAME Structure Byte 0 1 2 3 4 5 Content Identifier Data 1 Data 2 Data 3 Data 4 Checksum VDDReset StepLoss Bit 7 * ESW Bit 6 * Bit 5 1 Bit 4 0 Bit 3 ID3 AD[6:0] Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 ActPos[15:8] ActPos[7:0] ElDef UV2 TSD TW Tinfo[1:0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this GetActualPos command as there are stepper-motors connected to the LIN bus. Note: Bit 5 and bit 4 in byte 0 indicate the number of data bytes. 2. The master sends either a type#7 or type#8 preparing frame. After the type#7 or #8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit's in-frame response. Table 31. GetActualPos PREPARING FRAME TYPE #7 Byte Content Bit 7 0 1 2 3 Identifier Data 1 Data 2 Checksum * 1 1 Bit 6 * Bit 5 0 Structure Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x00 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 http://onsemi.com 43 AMIS-30621 Table 32. GetActualPos READING FRAME TYPE #6 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum VDDReset StepLoss Bit 7 0 ESW Bit 6 1 Bit 5 1 Bit 4 1 Bit 3 1 AD[6:0] Bit 2 1 Bit 1 0 Bit 0 1 ActPos[15:8] ActPos[7:0] ElDef UV2 0xFF 0xFF 0xFF 0xFF Checksum over data TSD TW Tinfo[1:0] Where: (*) According to parity computation Table 33. GetActualPos PREPARING FRAME TYPE #8 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD =80 CMD[6:0] = 0x00 AD[6:0] Data4[7:0] FF Data5[7:0] FF Data6[7:0] FF Data7[7:0] FF Data8[7:0] FF Checksum over data Table 34. GetActualPos READING FRAME TYPE #6 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum VDDReset StepLoss Bit 7 0 ESW Bit 6 1 Bit 5 1 Bit 4 1 Bit 3 1 AD[6:0] Bit 2 1 Bit 1 0 Bit 0 1 ActPos[15:8] ActPos[7:0] ElDef UV2 0xFF 0xFF 0xFF 0xFF Checksum over data TSD TW Tinfo[1:0] http://onsemi.com 44 AMIS-30621 GetFullStatus This command is provided to the circuit by the LIN master to get a complete status of the circuit and the stepper-motor. Refer to RAM Registers and Flags Table to see the meaning of the parameters sent to the LIN master. Note: A GetFullStatus command will attempt to reset flags The master sends either type#7 or type#8 preparing frame. GetFullStatus corresponds to 2 successive LIN in-frame responses with 0x3D indirect ID. Note: It is not mandatory for the LIN master to initiate the second in-frame response if the data in the second response frame is not needed by the application. 1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame type#6 to retrieve the circuit's in-frame response. Table 35. GetFullStatus PREPARING FRAME TYPE #7 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * 1 1 Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x01 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Table 36. GetFullStatus READING FRAME TYPE #6 (1) Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 AccShape VDDReset Bit 7 0 1 Irun[3:0] Vmax[3:0] StepMode[1:0] StepLoss Motion[2:0] 1 1 ElDef Shaft UV2 ESW 1 0xFF Checksum over data TSD OVC1 TimeE TW OVC2 DataE 1 HeadE Bit 6 1 Bit 5 1 Bit 4 1 Bit 3 1 AD[6:0] Ihold[3:0] Vmin[3:0] Acc[3:0] Tinfo[1:0] CPFail BitE Bit 2 1 Bit 1 0 Bit 0 1 Table 37. GetFullStatus READING FRAME TYPE #6 (2) Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 1 Bit 7 0 1 Bit 6 1 Bit 5 1 Bit 4 1 Bit 3 1 AD[6:0] ActPos[15:8] ActPos[7:0] TagPos[15:8] TagPos[7:0] SecPos[7:0] 1 0xFF Checksum over data 1 SecPos[10:8] Bit 2 1 Bit 1 0 Bit 0 1 Where: (*) According to parity computation http://onsemi.com 45 AMIS-30621 2. The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit's in-frame response. Table 38. GetFullStatus PREPARING FRAME TYPE#8 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD =80 CMD[6:0] = 0x01 AD[6:0] Data4[7:0] FF Data5[7:0] FF Data6[7:0] FF Data7[7:0] FF Data8[7:0] FF Checksum over data Table 39. GetFullStatus READING FRAME TYPE #6 (1) Structure Byte 0 1 2 3 4 5 6 7 8 6 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 AccShape VDDReset Bit 7 0 1 Irun[3:0] Vmax[3:0] StepMode[1:0] StepLoss Motion[2:0] 1 1 ElDef Shaft UV2 ESW 1 TSD OVC1 TimeE 0xFF Checksum over data TW OVC2 DataE 1 HeadE Bit 6 1 Bit 5 1 Bit 4 1 Bit 3 1 AD[6:0] Ihold[3:0] Vmin[3:0] Acc[3:0] Tinfo[1:0] CPFail BitE Bit 2 1 Bit 1 0 Bit 0 1 Table 40. GetFullStatus READING FRAME TYPE #6 (2) Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 1 1 0xFF Checksum over data Bit 7 0 1 Bit 6 1 Bit 5 1 Bit 4 1 Bit 3 1 AD[6:0] ActPos[15:8] ActPos[7:0] TagPos[15:8] TagPos[7:0] SecPos[7:0] 1 SecPos[10:8] Bit 2 1 Bit 1 0 Bit 0 1 http://onsemi.com 46 AMIS-30621 GetOTPparam This command is provided to the circuit by the LIN master after a preparing frame (see Preparing frames), to read the content of an OTP memory segment which address was specified in the preparation frame. GetOTPparam corresponds to a LIN in-frame response with 0x3D indirect ID. 1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame type#6 to retrieve the circuit's in-frame response. Table 41. GetOTPparam PREPARING FRAME TYPE #7 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * 1 1 Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x02 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Table 42. GetOTPparam READING FRAME TYPE #6 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum Bit 7 0 OSC3 1 ADM Irun3 Vmax3 SecPos10 SecPos7 Bit 6 1 OSC2 TSD2 (HW2) (Note 40) Irun2 Vmax2 SecPos9 SecPos6 Bit 5 1 OSC1 TSD1 (HW1) (Note 40) Irun1 Vmax1 SecPos8 SecPos5 Bit 4 1 OSC0 TSD0 (HW0) (Note 40) Irun0 Vmax0 Shaft SecPos4 Bit 3 1 IREF3 BG3 PA3 Ihold3 Vmin3 Acc3 SecPos3 StepMode1 Checksum over data Bit 2 1 IREF2 BG2 PA2 Ihold2 Vmin2 Acc2 SecPos2 StepMode0 Bit 1 0 IREF1 BG1 PA1 Ihold1 Vmin1 Acc1 SecPos1 LOCKBT Bit 0 1 IREF0 BG0 PA0 Ihold0 (Note 41) Vmin0 Acc0 SecPos0 LOCKBG Where: (*) According to parity computation 40. Although not stored in the OTP memory the physical status of the hardware address input pins are returned by a read of the OTP contents. 41. The Ihold0 bit is read as `1' for product version AIMS30621C6217G and AMIS30621C6217RG. 2. The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit's in-frame response. http://onsemi.com 47 AMIS-30621 Table 43. GetOTPparam PREPARING FRAME TYPE #8 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD =80 CMD[6:0] = 0x02 AD[6:0] Data4[7:0] FF Data5[7:0] FF Data6[7:0] FF Data7[7:0] FF Data8[7:0] FF Checksum over data Table 44. GetOTPparam READING FRAME TYPE #6 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum Bit 7 0 OSC3 1 ADM Irun3 Vmax3 SecPos10 SecPos7 Bit 6 1 OSC2 TSD2 (HW2) (Note 42) Irun2 Vmax2 SecPos9 SecPos6 Bit 5 1 OSC1 TSD1 (HW1) (Note 42) Irun1 Vmax1 SecPos8 SecPos5 Bit 4 1 OSC0 TSD0 (HW0) (Note 42) Irun0 Vmax0 Shaft SecPos4 Bit 3 1 IREF3 BG3 PA3 Ihold3 Vmin3 Acc3 SecPos3 StepMode1 Checksum over data Bit 2 1 IREF2 BG2 PA2 Ihold2 Vmin2 Acc2 SecPos2 StepMode0 Bit 1 0 IREF1 BG1 PA1 Ihold1 Vmin1 Acc1 SecPos1 LOCKBT Bit 0 1 IREF0 BG0 PA0 Ihold0 (Note 43) Vmin0 Acc0 SecPos0 LOCKBG 42. Although not stored in the OTP memory the physical status of the hardware address input pins are returned by a read of the OTP contents. 43. The Ihold0 bit is read as `1' for product version AIMS30621C6217G and AMIS30621C6217RG. GetStatus This command is provided to the circuit by the LIN master to get a quick status (compared to that of GetFullStatus command) of the circuit and of the stepper-motor. Refer to Flags Table to see the meaning of the parameters sent to the LIN master. Note: A GetStatus command will attempt to reset flags http://onsemi.com 48 AMIS-30621 GetStatus corresponds to a 2 data bytes LIN in-frame response with a direct ID (type #5). Table 45. GetStatus READING FRAME TYPE #5 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * ESW VDDReset StepLoss Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 AD[6:0] Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 ElDef UV2 TSD TW Tinfo[1:0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this GetStatus command as there are stepper-motors connected to the LIN bus. GotoSecurePosition This command is provided by the LIN master to one or all the stepper-motors to move to the secure position encoder description for more details. The priority encoder table also acknowledges the cases where a GotoSecurePosition command will be ignored. Note: the dynamic ID allocation has to be assigned to `General Purpose 2 Data bytes' ROM pointer, i.e. `0000'. The command is decoded only from the command data. GotoSecurePosition corresponds to the following LIN writing frame (type #1). Table 46. GotoSecurePosition WRITING FRAME TYPE #1 Structure Byte 0 1 2 3 Content Identifier Data Data Checksum Bit 7 * 1 Broad Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x04 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If Broad = `0' all the stepper motors connected to the LIN bus will reach their secure position HardStop may have been lost. Once the motor is stopped, http://onsemi.com 49 AMIS-30621 A hardstop command can also be issued by the LIN master for some safety reasons. It corresponds then to the following two data bytes LIN writing frame (type #1). Table 47. HardStop WRITING FRAME TYPE #1 Structure Byte 0 1 2 3 Content Identifier Data Data Checksum Bit 7 * 1 Broad Bit 6 * Bit 5 ID5 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x05 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If broad = `0' all stepper motors connected to the LIN bus will stop ResetPosition This command is provided to the circuit by the LIN master to reset Note: The dynamic ID allocation has to be assigned to `General Purpose 2 Data bytes' ROM pointer, i.e. `0000'. The command is decoded only from the command data. ResetPosition corresponds to the following LIN writing frames (type #1). Table 48. ResetPosition WRITING FRAME TYPE #1 Structure Byte 0 1 2 3 Content Identifier Data Data Checksum Bit 7 * 1 Broad Bit 6 * Bit 5 ID5 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x06 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If broad = `0' all the circuits connected to the LIN bus will reset their ResetToDefault This command is provided to the circuit by the LIN Master in order to reset to whole slave note into the initial state. ResetToDefault will, for instance, overwrite the RAM with the reset state of the registers parameters (See RAM Registers). This is another way for the master to initialize a slave node in case of emergency, or simply to refresh the RAM content. Note: the dynamic ID allocation has to be assigned to `General Purpose 2 Data bytes' ROM pointer, i.e. `0000'. The command is decoded only from the command data. http://onsemi.com 50 AMIS-30621 ResetToDefault will correspond to the following LIN writing frames (type #1). Table 49. ResetToDefault WRITING FRAME TYPE #1 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * 1 Broad Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x07 AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If broad = `0' all the stepper motors connected to the LIN bus will reset to default. SetDualPosition This command is provided to the circuit by the LIN master in order to perform a positioning of the motor using two different velocities. See Section Dual Positioning. After Dual positioning the internal flag "Reference done" is set. Note: This sequence cannot be interrupted by another positioning command. Important: If for some reason ActPos equals Pos1[15:0] at the moment the SetDualPosition command is issued, the circuit will enter in deadlock state. Therefore, the application should check the actual position by a GetPosition or a GetFullStatus command prior to start a dual positioning. Another solution may consist of programming a value out of the stepper motor range for Pos1[15:0]. For the same reason Pos2[15:0] should not be equal to Pos1[15:0]. SetDualPosition corresponds to the following LIN writing frame with 0x3C identifier (type #4). Table 50. SetDualPositioning WRITING FRAME TYPE #4 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 Broad Vmax[3:0] Pos1[15:8] Pos1[7:0] Pos2[15:8] Pos2[7:0] Checksum over data Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD = 0x80 CMD[6:0] = 0x08 AD[6:0] Vmin[3:0] Where: Broad: If broad = `0' all the circuits connected to the LIN bus will run the dual positioning Vmax[3:0]: Max velocity for first motion Vmin[3:0]: Min velocity for first motion and velocity for the second motion Pos1[15:0]: First position to be reached during the first motion Pos2[15:0]: Position of the second motion http://onsemi.com 51 AMIS-30621 SetMotorParam This command is provided to the circuit by the LIN master to set the values for the stepper motor parameters (listed below) in RAM. Refer to RAM Registers to see the meaning of the parameters sent by the LIN master. Important: If a SetMotorParam occurs while a motion is ongoing, it will modify at once the motion parameters (see Position Controller). Therefore the application should not change other parameter than SetMotorParam corresponds to the following LIN writing frame with 0x3C identifier (type #4). Table 51. SetMotorParam WRITING FRAME TYPE #4 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum X X X 1 Broad Irun[3:0] Vmax[3:0] SecPos[10:8] Shaft SecPos[7:0] AccShape Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD = 0x80 CMD[6:0] = 0x09 AD[6:0] Ihold[3:0] Vmin[3:0] Acc[3:0] StepMode[1:0] X X Checksum over data Where: Broad: If Broad = `0' all the circuits connected to the LIN bus will set the parameters in their RAMs as requested SetOTPparam This command is provided to the circuit by the LIN master to program the content D[7:0] of the OTP memory byte OTPA[2:0] and to zap it. Important: This command must be sent under a specific VBB voltage value. See parameter VBBOTP in DC Parameters. This is a mandatory condition to ensure reliable zapping. SetMotorParam corresponds to a 0x3C LIN writing frames (type #4). Table 52. SetOTPparam WRITING FRAME TYPE #4 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 Broad 1 1 1 1 D[7:0] 0xFF 0xFF 0xFF Checksum over data Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD = 0x80 CMD[6:0] = 0x10 AD[6:0] 1 OTPA[2:0] Where: Broad: If Broad = `0' all the circuits connected to the LIN bus will set the parameters in their OTP memories as requested http://onsemi.com 52 AMIS-30621 SetPosition This command is provided to the circuit by the LIN master to drive one or two motors to a given absolute position. See Positioning for more details. SetPosition corresponds to the following LIN write frames. 1. Two (2) Data bytes frame with a direct ID (type #3) Table 53. SetPosition WRITING FRAME TYPE #3 The priority encoder table (See Priority Encoder) describes the cases where a SetPosition command will be ignored. Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Pos[15 :8] Pos[7 :0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this SetPosition command as there are stepper-motors connected to the LIN bus. 2. Four (4) Data bytes frame with general purpose identifier (type #1). Note: the dynamic ID allocation has to be assigned to `General Purpose 4 Data bytes' ROM pointer, i.e. `0001'. Table 54. SetPosition WRITING FRAME TYPE #1 Structure Byte 0 1 2 3 4 5 Content Identifier Data 1 Data 2 Data 3 Data 4 Checksum Bit 7 * 1 Broad Bit 6 * Bit 5 1 Bit 4 0 Bit 3 ID3 CMD[6:0] = 0x0B AD[6:0] Pos[15:8] Pos[7:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If broad = `0' all the stepper motors connected to the LIN will must go to Pos[15:0]. 3. Two (2) motors positioning frame with 0x3C identifier (type #4) http://onsemi.com 53 AMIS-30621 Table 55. SetPosition WRITING FRAME TYPE #4 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum 1 1 1 Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 AppCMD = 0x80 CMD[6:0] = 0x0B AD1[6:0] Pos1[15:8] Pos1[7:0] AD2[6:0] Pos2[15:8] Pos2[7:0] Checksum over data Where: Adn[6:0]: Motor #n physical address (n [1,2]). Posn[15:0]: Signed 16-bit position set-point for motor #n. SetPositionShort This command is provided to the circuit by the LIN Master to drive one, two or four motors to a given absolute position. It applies only for half stepping mode (StepMode[1:0] = "00") and is ignored when in other stepping modes. See Positioning for more details. The physical address is coded on 4 bits, hence SetPositionShort can only be used with a network implementing a maximum of 16 slave nodes. These 4 bits are corresponding to the bits PA[3:0] in OTP memory. For SetPositionShort operation: It is recommended to set HW0 and HW1 to '1'. If the ADM bit is set to '1' the PA0 bit in OTP has to programmed to '1'. If the ADM bit is set to '0', HW2 has to be set to '1'. Two different cases must be considered, depending on the programmed value of the ADMbit in the OTP memory. Bit PA0 in OTP memory AD[0] 1 1 ADM 0 1 1 AD[3] X 0 1 Pin HW0 Pin HW1 Pin HW2 Tied to VBB Tied to VDD Tied to GND Tied to VBB The priority encoder table (See Priority Encoder) describes the cases where a SetPositionShort command will be ignored. SetPositionShort corresponds to the following LIN writing frames: 1. Two (2) data bytes frame for one (1) motor, with specific identifier (type #2) Table 56. SetPositionShort WRITING FRAME TYPE #2 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * Bit 6 * Pos[10:8] Bit 5 0 Bit 4 ID4 Broad Pos [7:0] Checksum over data Bit 3 ID3 Bit 2 ID2 AD [3:0] Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If broad = `0' all the stepper motors connected to the LIN bus will go to Pos[10:0]. ID[5:0]: Dynamically allocated identifier to two data bytes SetPositionShort command. http://onsemi.com 54 AMIS-30621 2. Four (4) data bytes frame for two (2) motors, with specific identifier (type # 2) Table 57. SetPositionShort WRITING FRAME TYPE #2 Byte Content Bit 7 0 1 2 3 4 5 Identifier Data 1 Data 2 Data 3 Data 4 Checksum Pos2[10:8] 1 Pos2[7:0] Checksum over data * Bit 6 * Pos1[10:8] Bit 5 1 Structure Bit 4 0 1 Pos1[7:0] AD2[3:0] Bit 3 ID3 Bit 2 ID2 AD1[3:0] Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation ID[5:0]: Dynamically allocated identifier to four data bytes SetPositionShort command. Adn[3:0]: Motor #n physical address least significant bits (n [1,2]). Posn[10:0]: Signed 11-bit position set point for Motor #n (see RAM Registers) 3. Eight (8) data bytes frame for four (4) motors, with specific identifier (type #2) Table 58. SetPositionShort WRITING FRAME TYPE #2 Structure Byte 0 1 2 3 4 5 6 7 8 9 Content Identifier Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 Checksum Pos4[10:8] 1 Pos4[7:0] Checksum over data Pos3[10:8] 1 Pos3[7:0] AD4[3:0] Pos2[10:8] 1 Pos2[7:0] AD3[3:0] Bit 7 * Bit 6 * Pos1[10:8] Bit 5 1 Bit 4 1 1 Pos1[7:0] AD2[3:0] Bit 3 ID3 Bit 2 ID2 AD1[3:0] Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation ID[5:0]: Dynamically allocated identifier to eight data bytes SetPositionShort command. Adn[3:0]: Motor #n physical address least significant bits (n [1,4]). Posn[10:0]: Signed 11-bit position set point for Motor #n (see RAM Registers) Sleep This command is provided to the circuit by the LIN master to put all the slave nodes connected to the LIN bus into sleep mode. If this command occurs during a motion of the motor, TagPos is reprogrammed to SecPos (provided SecPos is different from "100 0000 0000"), or a SoftStop is executed before going to sleep mode. See LIN 1.3 specification and Sleep Mode. The corresponding LIN frame is a master request command frame (identifier 0x3C) with data byte 1 containing 0x00 while the followings contain 0xFF. http://onsemi.com 55 AMIS-30621 Table 59. Sleep WRITING FRAME Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 0 Bit 6 0 Bit 5 1 Bit 4 1 0x00 0xFF Checksum over data Bit 3 1 Bit 2 1 Bit 1 0 Bit 0 0 SoftStop If a SoftStop command occurs during a motion of the stepper motor, it provokes an immediate deceleration to Vmin (see Minimum Velocity) followed by a stop, regardless of the position reached. Once the motor is stopped, TagPos register is overwritten with value in ActPos register to ensure keeping the stop position. Note: The dynamic ID allocation has to be assigned to * The LIN master requests a SoftStop. `General Purpose 2 Data bytes' ROM pointer `0000'. The * The SoftStop will correspond to the following two command is decoded only from the command data. data bytes LIN writing frame (type #1). Note: A SoftStop command occurring during a DualPosition sequence is not taken into account. Command SoftStop occurs in the following cases: * The chip temperature rises above the thermal shutdown threshold (see DC Parameters and Temperature Management); Table 60. SoftStop WRITING FRAME TYPE #1 Structure Byte 0 1 2 3 Content Identifier Data 1 Data 2 Checksum Bit 7 * 1 Broad Bit 6 * Bit 5 0 Bit 4 ID4 Bit 3 ID3 CMD[6:0] = 0x0F AD[6:0] Checksum over data Bit 2 ID2 Bit 1 ID1 Bit 0 ID0 Where: (*) According to parity computation Broad: If broad = `0' all the stepper motors connected to the LIN bus will stop with deceleration. http://onsemi.com 56 AMIS-30621 PACKAGE DIMENSIONS SOIC 20 W CASE 751AQ-01 ISSUE O http://onsemi.com 57 AMIS-30621 PACKAGE DIMENSIONS NQFP-32, 7x7 CASE 560AA-01 ISSUE O http://onsemi.com 58 AMIS-30621 NQFP-32, 7x7 CASE 560AA-01 ISSUE O ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 59 AMIS-30621/D |
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